-- Copyright (C) 1991-2013 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files from any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.

-- VENDOR "Altera"
-- PROGRAM "Quartus II 64-Bit"
-- VERSION "Version 13.1.0 Build 162 10/23/2013 SJ Full Version"

-- DATE "04/23/2021 21:47:38"

-- 
-- Device: Altera EP3C40F780C8 Package FBGA780
-- 

-- 
-- This VHDL file should be used for ModelSim-Altera (VHDL) only
-- 

LIBRARY ALTERA;
LIBRARY CYCLONEIII;
LIBRARY IEEE;
USE ALTERA.ALTERA_PRIMITIVES_COMPONENTS.ALL;
USE CYCLONEIII.CYCLONEIII_COMPONENTS.ALL;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY 	zl_2346_4 IS
    PORT (
	cin : IN std_logic;
	clk : IN std_logic;
	s : IN std_logic_vector(2 DOWNTO 0);
	datain : IN std_logic_vector(3 DOWNTO 0);
	wt : IN std_logic;
	sel : IN std_logic;
	en : IN std_logic;
	overflow : OUT std_logic;
	codeout : OUT std_logic_vector(7 DOWNTO 0);
	segsel : OUT std_logic_vector(7 DOWNTO 0)
	);
END zl_2346_4;

-- Design Ports Information
-- overflow	=>  Location: PIN_K22,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- codeout[0]	=>  Location: PIN_L27,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- codeout[1]	=>  Location: PIN_N25,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- codeout[2]	=>  Location: PIN_N21,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- codeout[3]	=>  Location: PIN_L24,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- codeout[4]	=>  Location: PIN_C21,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- codeout[5]	=>  Location: PIN_J23,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- codeout[6]	=>  Location: PIN_G24,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- codeout[7]	=>  Location: PIN_F21,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- segsel[0]	=>  Location: PIN_N26,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- segsel[1]	=>  Location: PIN_M26,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- segsel[2]	=>  Location: PIN_L20,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- segsel[3]	=>  Location: PIN_AF3,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- segsel[4]	=>  Location: PIN_AE20,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- segsel[5]	=>  Location: PIN_D13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- segsel[6]	=>  Location: PIN_Y10,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- segsel[7]	=>  Location: PIN_C22,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- s[1]	=>  Location: PIN_L22,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- cin	=>  Location: PIN_M27,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- s[2]	=>  Location: PIN_J26,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- s[0]	=>  Location: PIN_L23,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- clk	=>  Location: PIN_J2,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- datain[3]	=>  Location: PIN_M25,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- en	=>  Location: PIN_M28,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- wt	=>  Location: PIN_P27,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- sel	=>  Location: PIN_L28,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- datain[2]	=>  Location: PIN_K21,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- datain[1]	=>  Location: PIN_H25,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- datain[0]	=>  Location: PIN_M23,	 I/O Standard: 2.5 V,	 Current Strength: Default


ARCHITECTURE structure OF zl_2346_4 IS
SIGNAL gnd : std_logic := '0';
SIGNAL vcc : std_logic := '1';
SIGNAL unknown : std_logic := 'X';
SIGNAL devoe : std_logic := '1';
SIGNAL devclrn : std_logic := '1';
SIGNAL devpor : std_logic := '1';
SIGNAL ww_devoe : std_logic;
SIGNAL ww_devclrn : std_logic;
SIGNAL ww_devpor : std_logic;
SIGNAL ww_cin : std_logic;
SIGNAL ww_clk : std_logic;
SIGNAL ww_s : std_logic_vector(2 DOWNTO 0);
SIGNAL ww_datain : std_logic_vector(3 DOWNTO 0);
SIGNAL ww_wt : std_logic;
SIGNAL ww_sel : std_logic;
SIGNAL ww_en : std_logic;
SIGNAL ww_overflow : std_logic;
SIGNAL ww_codeout : std_logic_vector(7 DOWNTO 0);
SIGNAL ww_segsel : std_logic_vector(7 DOWNTO 0);
SIGNAL \clk~inputclkctrl_INCLK_bus\ : std_logic_vector(3 DOWNTO 0);
SIGNAL \overflow~output_o\ : std_logic;
SIGNAL \codeout[0]~output_o\ : std_logic;
SIGNAL \codeout[1]~output_o\ : std_logic;
SIGNAL \codeout[2]~output_o\ : std_logic;
SIGNAL \codeout[3]~output_o\ : std_logic;
SIGNAL \codeout[4]~output_o\ : std_logic;
SIGNAL \codeout[5]~output_o\ : std_logic;
SIGNAL \codeout[6]~output_o\ : std_logic;
SIGNAL \codeout[7]~output_o\ : std_logic;
SIGNAL \segsel[0]~output_o\ : std_logic;
SIGNAL \segsel[1]~output_o\ : std_logic;
SIGNAL \segsel[2]~output_o\ : std_logic;
SIGNAL \segsel[3]~output_o\ : std_logic;
SIGNAL \segsel[4]~output_o\ : std_logic;
SIGNAL \segsel[5]~output_o\ : std_logic;
SIGNAL \segsel[6]~output_o\ : std_logic;
SIGNAL \segsel[7]~output_o\ : std_logic;
SIGNAL \clk~input_o\ : std_logic;
SIGNAL \clk~inputclkctrl_outclk\ : std_logic;
SIGNAL \s[0]~input_o\ : std_logic;
SIGNAL \s[1]~input_o\ : std_logic;
SIGNAL \s[2]~input_o\ : std_logic;
SIGNAL \en~input_o\ : std_logic;
SIGNAL \wt~input_o\ : std_logic;
SIGNAL \datain[3]~input_o\ : std_logic;
SIGNAL \D~0_combout\ : std_logic;
SIGNAL \sel~input_o\ : std_logic;
SIGNAL \B[7]~0_combout\ : std_logic;
SIGNAL \A[7]~0_combout\ : std_logic;
SIGNAL \datain[2]~input_o\ : std_logic;
SIGNAL \D~1_combout\ : std_logic;
SIGNAL \datain[1]~input_o\ : std_logic;
SIGNAL \D~2_combout\ : std_logic;
SIGNAL \datain[0]~input_o\ : std_logic;
SIGNAL \D~3_combout\ : std_logic;
SIGNAL \D~4_combout\ : std_logic;
SIGNAL \D~5_combout\ : std_logic;
SIGNAL \D~6_combout\ : std_logic;
SIGNAL \D~7_combout\ : std_logic;
SIGNAL \cin~input_o\ : std_logic;
SIGNAL \Add0~1_cout\ : std_logic;
SIGNAL \Add0~3\ : std_logic;
SIGNAL \Add0~5\ : std_logic;
SIGNAL \Add0~7\ : std_logic;
SIGNAL \Add0~9\ : std_logic;
SIGNAL \Add0~11\ : std_logic;
SIGNAL \Add0~13\ : std_logic;
SIGNAL \Add0~15\ : std_logic;
SIGNAL \Add0~17\ : std_logic;
SIGNAL \Add0~18_combout\ : std_logic;
SIGNAL \Add0~16_combout\ : std_logic;
SIGNAL \Mux8~0_combout\ : std_logic;
SIGNAL \Mux8~1_combout\ : std_logic;
SIGNAL \overflow~reg0_q\ : std_logic;
SIGNAL \segsel[1]~reg0_q\ : std_logic;
SIGNAL \segsel[0]~2_combout\ : std_logic;
SIGNAL \segsel[0]~reg0_q\ : std_logic;
SIGNAL \segsel~0_combout\ : std_logic;
SIGNAL \Selector3~14_combout\ : std_logic;
SIGNAL \Selector3~2_combout\ : std_logic;
SIGNAL \segsel[2]~reg0_q\ : std_logic;
SIGNAL \segsel~1_combout\ : std_logic;
SIGNAL \Selector3~5_combout\ : std_logic;
SIGNAL \Selector3~4_combout\ : std_logic;
SIGNAL \Selector3~3_combout\ : std_logic;
SIGNAL \Selector3~6_combout\ : std_logic;
SIGNAL \Selector3~8_combout\ : std_logic;
SIGNAL \Selector3~7_combout\ : std_logic;
SIGNAL \Selector3~9_combout\ : std_logic;
SIGNAL \Add0~10_combout\ : std_logic;
SIGNAL \Add0~2_combout\ : std_logic;
SIGNAL \Selector3~10_combout\ : std_logic;
SIGNAL \Selector3~11_combout\ : std_logic;
SIGNAL \Selector3~12_combout\ : std_logic;
SIGNAL \Selector3~13_combout\ : std_logic;
SIGNAL \Selector1~8_combout\ : std_logic;
SIGNAL \Selector1~10_combout\ : std_logic;
SIGNAL \Selector1~22_combout\ : std_logic;
SIGNAL \Selector1~11_combout\ : std_logic;
SIGNAL \Selector1~6_combout\ : std_logic;
SIGNAL \Selector1~12_combout\ : std_logic;
SIGNAL \Selector1~7_combout\ : std_logic;
SIGNAL \Selector1~9_combout\ : std_logic;
SIGNAL \Selector1~21_combout\ : std_logic;
SIGNAL \Selector1~13_combout\ : std_logic;
SIGNAL \R~3_combout\ : std_logic;
SIGNAL \Selector1~5_combout\ : std_logic;
SIGNAL \Selector1~4_combout\ : std_logic;
SIGNAL \Selector1~16_combout\ : std_logic;
SIGNAL \Selector0~4_combout\ : std_logic;
SIGNAL \Add0~14_combout\ : std_logic;
SIGNAL \Selector1~17_combout\ : std_logic;
SIGNAL \R~2_combout\ : std_logic;
SIGNAL \Selector1~14_combout\ : std_logic;
SIGNAL \Add0~6_combout\ : std_logic;
SIGNAL \Selector1~15_combout\ : std_logic;
SIGNAL \Selector1~18_combout\ : std_logic;
SIGNAL \Selector1~19_combout\ : std_logic;
SIGNAL \Selector1~20_combout\ : std_logic;
SIGNAL \Selector2~9_combout\ : std_logic;
SIGNAL \Selector2~6_combout\ : std_logic;
SIGNAL \Add0~4_combout\ : std_logic;
SIGNAL \R~0_combout\ : std_logic;
SIGNAL \Selector2~2_combout\ : std_logic;
SIGNAL \Selector2~3_combout\ : std_logic;
SIGNAL \R~1_combout\ : std_logic;
SIGNAL \Selector2~4_combout\ : std_logic;
SIGNAL \Add0~12_combout\ : std_logic;
SIGNAL \Selector2~5_combout\ : std_logic;
SIGNAL \Selector2~10_combout\ : std_logic;
SIGNAL \Selector2~11_combout\ : std_logic;
SIGNAL \Selector2~7_combout\ : std_logic;
SIGNAL \Selector2~8_combout\ : std_logic;
SIGNAL \Selector0~14_combout\ : std_logic;
SIGNAL \Selector0~5_combout\ : std_logic;
SIGNAL \Selector0~8_combout\ : std_logic;
SIGNAL \Selector0~9_combout\ : std_logic;
SIGNAL \Add0~8_combout\ : std_logic;
SIGNAL \Selector0~10_combout\ : std_logic;
SIGNAL \Selector0~11_combout\ : std_logic;
SIGNAL \Selector0~6_combout\ : std_logic;
SIGNAL \Mux0~0_combout\ : std_logic;
SIGNAL \Mux0~1_combout\ : std_logic;
SIGNAL \Selector0~15_combout\ : std_logic;
SIGNAL \Selector0~7_combout\ : std_logic;
SIGNAL \Selector0~12_combout\ : std_logic;
SIGNAL \Selector0~13_combout\ : std_logic;
SIGNAL \WideOr7~0_combout\ : std_logic;
SIGNAL \codeout[0]~reg0_q\ : std_logic;
SIGNAL \WideOr6~0_combout\ : std_logic;
SIGNAL \codeout[1]~reg0_q\ : std_logic;
SIGNAL \WideOr5~0_combout\ : std_logic;
SIGNAL \codeout[2]~reg0_q\ : std_logic;
SIGNAL \WideOr4~0_combout\ : std_logic;
SIGNAL \codeout[3]~reg0_q\ : std_logic;
SIGNAL \WideOr3~0_combout\ : std_logic;
SIGNAL \codeout[4]~reg0_q\ : std_logic;
SIGNAL \WideOr2~0_combout\ : std_logic;
SIGNAL \codeout[5]~reg0_q\ : std_logic;
SIGNAL \WideOr1~0_combout\ : std_logic;
SIGNAL \codeout[6]~reg0_q\ : std_logic;
SIGNAL D : std_logic_vector(7 DOWNTO 0);
SIGNAL B : std_logic_vector(7 DOWNTO 0);
SIGNAL A : std_logic_vector(7 DOWNTO 0);

BEGIN

ww_cin <= cin;
ww_clk <= clk;
ww_s <= s;
ww_datain <= datain;
ww_wt <= wt;
ww_sel <= sel;
ww_en <= en;
overflow <= ww_overflow;
codeout <= ww_codeout;
segsel <= ww_segsel;
ww_devoe <= devoe;
ww_devclrn <= devclrn;
ww_devpor <= devpor;

\clk~inputclkctrl_INCLK_bus\ <= (vcc & vcc & vcc & \clk~input_o\);

-- Location: IOOBUF_X67_Y29_N2
\overflow~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \overflow~reg0_q\,
	devoe => ww_devoe,
	o => \overflow~output_o\);

-- Location: IOOBUF_X67_Y32_N23
\codeout[0]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \codeout[0]~reg0_q\,
	devoe => ww_devoe,
	o => \codeout[0]~output_o\);

-- Location: IOOBUF_X67_Y26_N9
\codeout[1]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \codeout[1]~reg0_q\,
	devoe => ww_devoe,
	o => \codeout[1]~output_o\);

-- Location: IOOBUF_X67_Y26_N23
\codeout[2]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \codeout[2]~reg0_q\,
	devoe => ww_devoe,
	o => \codeout[2]~output_o\);

-- Location: IOOBUF_X67_Y32_N16
\codeout[3]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \codeout[3]~reg0_q\,
	devoe => ww_devoe,
	o => \codeout[3]~output_o\);

-- Location: IOOBUF_X54_Y43_N23
\codeout[4]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \codeout[4]~reg0_q\,
	devoe => ww_devoe,
	o => \codeout[4]~output_o\);

-- Location: IOOBUF_X67_Y31_N9
\codeout[5]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \codeout[5]~reg0_q\,
	devoe => ww_devoe,
	o => \codeout[5]~output_o\);

-- Location: IOOBUF_X67_Y26_N2
\codeout[6]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \codeout[6]~reg0_q\,
	devoe => ww_devoe,
	o => \codeout[6]~output_o\);

-- Location: IOOBUF_X61_Y43_N2
\codeout[7]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => GND,
	devoe => ww_devoe,
	o => \codeout[7]~output_o\);

-- Location: IOOBUF_X67_Y28_N23
\segsel[0]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \segsel[0]~reg0_q\,
	devoe => ww_devoe,
	o => \segsel[0]~output_o\);

-- Location: IOOBUF_X67_Y29_N9
\segsel[1]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \segsel[1]~reg0_q\,
	devoe => ww_devoe,
	o => \segsel[1]~output_o\);

-- Location: IOOBUF_X67_Y29_N16
\segsel[2]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \segsel[2]~reg0_q\,
	devoe => ww_devoe,
	o => \segsel[2]~output_o\);

-- Location: IOOBUF_X0_Y2_N23
\segsel[3]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => GND,
	devoe => ww_devoe,
	o => \segsel[3]~output_o\);

-- Location: IOOBUF_X56_Y0_N23
\segsel[4]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => GND,
	devoe => ww_devoe,
	o => \segsel[4]~output_o\);

-- Location: IOOBUF_X32_Y43_N9
\segsel[5]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => GND,
	devoe => ww_devoe,
	o => \segsel[5]~output_o\);

-- Location: IOOBUF_X3_Y0_N16
\segsel[6]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => GND,
	devoe => ww_devoe,
	o => \segsel[6]~output_o\);

-- Location: IOOBUF_X56_Y43_N30
\segsel[7]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => GND,
	devoe => ww_devoe,
	o => \segsel[7]~output_o\);

-- Location: IOIBUF_X0_Y21_N1
\clk~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_clk,
	o => \clk~input_o\);

-- Location: CLKCTRL_G4
\clk~inputclkctrl\ : cycloneiii_clkctrl
-- pragma translate_off
GENERIC MAP (
	clock_type => "global clock",
	ena_register_mode => "none")
-- pragma translate_on
PORT MAP (
	inclk => \clk~inputclkctrl_INCLK_bus\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	outclk => \clk~inputclkctrl_outclk\);

-- Location: IOIBUF_X67_Y30_N22
\s[0]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_s(0),
	o => \s[0]~input_o\);

-- Location: IOIBUF_X67_Y28_N15
\s[1]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_s(1),
	o => \s[1]~input_o\);

-- Location: IOIBUF_X67_Y30_N15
\s[2]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_s(2),
	o => \s[2]~input_o\);

-- Location: IOIBUF_X67_Y28_N8
\en~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_en,
	o => \en~input_o\);

-- Location: IOIBUF_X67_Y27_N15
\wt~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_wt,
	o => \wt~input_o\);

-- Location: FF_X59_Y29_N15
\D[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \D~0_combout\,
	ena => \wt~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => D(7));

-- Location: IOIBUF_X67_Y31_N22
\datain[3]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_datain(3),
	o => \datain[3]~input_o\);

-- Location: LCCOMB_X59_Y29_N14
\D~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \D~0_combout\ = (\en~input_o\ & ((\datain[3]~input_o\))) # (!\en~input_o\ & (D(7)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en~input_o\,
	datac => D(7),
	datad => \datain[3]~input_o\,
	combout => \D~0_combout\);

-- Location: IOIBUF_X67_Y31_N1
\sel~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_sel,
	o => \sel~input_o\);

-- Location: LCCOMB_X59_Y29_N6
\B[7]~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \B[7]~0_combout\ = (\wt~input_o\ & !\sel~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \wt~input_o\,
	datad => \sel~input_o\,
	combout => \B[7]~0_combout\);

-- Location: FF_X56_Y29_N23
\B[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~0_combout\,
	sload => VCC,
	ena => \B[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => B(7));

-- Location: LCCOMB_X59_Y29_N28
\A[7]~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \A[7]~0_combout\ = (\wt~input_o\ & \sel~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \wt~input_o\,
	datad => \sel~input_o\,
	combout => \A[7]~0_combout\);

-- Location: FF_X56_Y29_N21
\A[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~0_combout\,
	sload => VCC,
	ena => \A[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(7));

-- Location: FF_X59_Y29_N9
\D[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \D~1_combout\,
	ena => \wt~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => D(6));

-- Location: IOIBUF_X67_Y30_N1
\datain[2]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_datain(2),
	o => \datain[2]~input_o\);

-- Location: LCCOMB_X59_Y29_N8
\D~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \D~1_combout\ = (\en~input_o\ & ((\datain[2]~input_o\))) # (!\en~input_o\ & (D(6)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en~input_o\,
	datac => D(6),
	datad => \datain[2]~input_o\,
	combout => \D~1_combout\);

-- Location: FF_X57_Y29_N5
\A[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~1_combout\,
	sload => VCC,
	ena => \A[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(6));

-- Location: FF_X56_Y29_N19
\B[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~1_combout\,
	sload => VCC,
	ena => \B[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => B(6));

-- Location: FF_X59_Y29_N19
\D[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \D~2_combout\,
	ena => \wt~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => D(5));

-- Location: IOIBUF_X67_Y30_N8
\datain[1]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_datain(1),
	o => \datain[1]~input_o\);

-- Location: LCCOMB_X59_Y29_N18
\D~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \D~2_combout\ = (\en~input_o\ & ((\datain[1]~input_o\))) # (!\en~input_o\ & (D(5)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en~input_o\,
	datac => D(5),
	datad => \datain[1]~input_o\,
	combout => \D~2_combout\);

-- Location: FF_X56_Y29_N17
\B[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~2_combout\,
	sload => VCC,
	ena => \B[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => B(5));

-- Location: FF_X57_Y29_N11
\A[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~2_combout\,
	sload => VCC,
	ena => \A[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(5));

-- Location: IOIBUF_X67_Y28_N1
\datain[0]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_datain(0),
	o => \datain[0]~input_o\);

-- Location: FF_X59_Y29_N5
\D[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \D~3_combout\,
	ena => \wt~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => D(4));

-- Location: LCCOMB_X59_Y29_N4
\D~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \D~3_combout\ = (\en~input_o\ & (\datain[0]~input_o\)) # (!\en~input_o\ & ((D(4))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \datain[0]~input_o\,
	datac => D(4),
	datad => \en~input_o\,
	combout => \D~3_combout\);

-- Location: FF_X56_Y29_N27
\B[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~3_combout\,
	sload => VCC,
	ena => \B[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => B(4));

-- Location: FF_X56_Y29_N25
\A[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~3_combout\,
	sload => VCC,
	ena => \A[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(4));

-- Location: FF_X59_Y29_N27
\D[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \D~4_combout\,
	ena => \wt~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => D(3));

-- Location: LCCOMB_X59_Y29_N26
\D~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \D~4_combout\ = (\en~input_o\ & (D(3))) # (!\en~input_o\ & ((\datain[3]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en~input_o\,
	datac => D(3),
	datad => \datain[3]~input_o\,
	combout => \D~4_combout\);

-- Location: FF_X56_Y29_N13
\A[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~4_combout\,
	sload => VCC,
	ena => \A[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(3));

-- Location: FF_X56_Y29_N5
\B[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~4_combout\,
	sload => VCC,
	ena => \B[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => B(3));

-- Location: FF_X59_Y29_N25
\D[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \D~5_combout\,
	ena => \wt~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => D(2));

-- Location: LCCOMB_X59_Y29_N24
\D~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \D~5_combout\ = (\en~input_o\ & (D(2))) # (!\en~input_o\ & ((\datain[2]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en~input_o\,
	datac => D(2),
	datad => \datain[2]~input_o\,
	combout => \D~5_combout\);

-- Location: FF_X56_Y29_N11
\B[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~5_combout\,
	sload => VCC,
	ena => \B[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => B(2));

-- Location: FF_X57_Y29_N25
\A[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~5_combout\,
	sload => VCC,
	ena => \A[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(2));

-- Location: FF_X59_Y29_N11
\D[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \D~6_combout\,
	ena => \wt~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => D(1));

-- Location: LCCOMB_X59_Y29_N10
\D~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \D~6_combout\ = (\en~input_o\ & (D(1))) # (!\en~input_o\ & ((\datain[1]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en~input_o\,
	datac => D(1),
	datad => \datain[1]~input_o\,
	combout => \D~6_combout\);

-- Location: FF_X56_Y29_N29
\A[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~6_combout\,
	sload => VCC,
	ena => \A[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(1));

-- Location: FF_X56_Y29_N15
\B[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~6_combout\,
	sload => VCC,
	ena => \B[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => B(1));

-- Location: FF_X59_Y29_N17
\D[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \D~7_combout\,
	ena => \wt~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => D(0));

-- Location: LCCOMB_X59_Y29_N16
\D~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \D~7_combout\ = (\en~input_o\ & ((D(0)))) # (!\en~input_o\ & (\datain[0]~input_o\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \datain[0]~input_o\,
	datac => D(0),
	datad => \en~input_o\,
	combout => \D~7_combout\);

-- Location: FF_X56_Y29_N7
\B[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~7_combout\,
	sload => VCC,
	ena => \B[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => B(0));

-- Location: FF_X56_Y29_N31
\A[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \D~7_combout\,
	sload => VCC,
	ena => \A[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(0));

-- Location: IOIBUF_X67_Y29_N22
\cin~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_cin,
	o => \cin~input_o\);

-- Location: LCCOMB_X56_Y29_N4
\Add0~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~1_cout\ = CARRY(\cin~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \cin~input_o\,
	datad => VCC,
	cout => \Add0~1_cout\);

-- Location: LCCOMB_X56_Y29_N6
\Add0~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~2_combout\ = (B(0) & ((A(0) & (\Add0~1_cout\ & VCC)) # (!A(0) & (!\Add0~1_cout\)))) # (!B(0) & ((A(0) & (!\Add0~1_cout\)) # (!A(0) & ((\Add0~1_cout\) # (GND)))))
-- \Add0~3\ = CARRY((B(0) & (!A(0) & !\Add0~1_cout\)) # (!B(0) & ((!\Add0~1_cout\) # (!A(0)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => B(0),
	datab => A(0),
	datad => VCC,
	cin => \Add0~1_cout\,
	combout => \Add0~2_combout\,
	cout => \Add0~3\);

-- Location: LCCOMB_X56_Y29_N8
\Add0~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~4_combout\ = ((A(1) $ (B(1) $ (!\Add0~3\)))) # (GND)
-- \Add0~5\ = CARRY((A(1) & ((B(1)) # (!\Add0~3\))) # (!A(1) & (B(1) & !\Add0~3\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => A(1),
	datab => B(1),
	datad => VCC,
	cin => \Add0~3\,
	combout => \Add0~4_combout\,
	cout => \Add0~5\);

-- Location: LCCOMB_X56_Y29_N10
\Add0~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~6_combout\ = (B(2) & ((A(2) & (\Add0~5\ & VCC)) # (!A(2) & (!\Add0~5\)))) # (!B(2) & ((A(2) & (!\Add0~5\)) # (!A(2) & ((\Add0~5\) # (GND)))))
-- \Add0~7\ = CARRY((B(2) & (!A(2) & !\Add0~5\)) # (!B(2) & ((!\Add0~5\) # (!A(2)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => B(2),
	datab => A(2),
	datad => VCC,
	cin => \Add0~5\,
	combout => \Add0~6_combout\,
	cout => \Add0~7\);

-- Location: LCCOMB_X56_Y29_N12
\Add0~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~8_combout\ = ((A(3) $ (B(3) $ (!\Add0~7\)))) # (GND)
-- \Add0~9\ = CARRY((A(3) & ((B(3)) # (!\Add0~7\))) # (!A(3) & (B(3) & !\Add0~7\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => A(3),
	datab => B(3),
	datad => VCC,
	cin => \Add0~7\,
	combout => \Add0~8_combout\,
	cout => \Add0~9\);

-- Location: LCCOMB_X56_Y29_N14
\Add0~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~10_combout\ = (B(4) & ((A(4) & (\Add0~9\ & VCC)) # (!A(4) & (!\Add0~9\)))) # (!B(4) & ((A(4) & (!\Add0~9\)) # (!A(4) & ((\Add0~9\) # (GND)))))
-- \Add0~11\ = CARRY((B(4) & (!A(4) & !\Add0~9\)) # (!B(4) & ((!\Add0~9\) # (!A(4)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => B(4),
	datab => A(4),
	datad => VCC,
	cin => \Add0~9\,
	combout => \Add0~10_combout\,
	cout => \Add0~11\);

-- Location: LCCOMB_X56_Y29_N16
\Add0~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~12_combout\ = ((B(5) $ (A(5) $ (!\Add0~11\)))) # (GND)
-- \Add0~13\ = CARRY((B(5) & ((A(5)) # (!\Add0~11\))) # (!B(5) & (A(5) & !\Add0~11\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => B(5),
	datab => A(5),
	datad => VCC,
	cin => \Add0~11\,
	combout => \Add0~12_combout\,
	cout => \Add0~13\);

-- Location: LCCOMB_X56_Y29_N18
\Add0~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~14_combout\ = (A(6) & ((B(6) & (\Add0~13\ & VCC)) # (!B(6) & (!\Add0~13\)))) # (!A(6) & ((B(6) & (!\Add0~13\)) # (!B(6) & ((\Add0~13\) # (GND)))))
-- \Add0~15\ = CARRY((A(6) & (!B(6) & !\Add0~13\)) # (!A(6) & ((!\Add0~13\) # (!B(6)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => A(6),
	datab => B(6),
	datad => VCC,
	cin => \Add0~13\,
	combout => \Add0~14_combout\,
	cout => \Add0~15\);

-- Location: LCCOMB_X56_Y29_N20
\Add0~16\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~16_combout\ = ((B(7) $ (A(7) $ (!\Add0~15\)))) # (GND)
-- \Add0~17\ = CARRY((B(7) & ((A(7)) # (!\Add0~15\))) # (!B(7) & (A(7) & !\Add0~15\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => B(7),
	datab => A(7),
	datad => VCC,
	cin => \Add0~15\,
	combout => \Add0~16_combout\,
	cout => \Add0~17\);

-- Location: LCCOMB_X56_Y29_N22
\Add0~18\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~18_combout\ = B(7) $ (\Add0~17\ $ (A(7)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010101011010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => B(7),
	datad => A(7),
	cin => \Add0~17\,
	combout => \Add0~18_combout\);

-- Location: LCCOMB_X53_Y29_N24
\Mux8~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux8~0_combout\ = (\s[1]~input_o\ & (\overflow~reg0_q\)) # (!\s[1]~input_o\ & ((\Add0~18_combout\ $ (\Add0~16_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1000101110111000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \overflow~reg0_q\,
	datab => \s[1]~input_o\,
	datac => \Add0~18_combout\,
	datad => \Add0~16_combout\,
	combout => \Mux8~0_combout\);

-- Location: LCCOMB_X53_Y29_N28
\Mux8~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux8~1_combout\ = (\s[2]~input_o\ & (\Mux8~0_combout\ & (\s[0]~input_o\ $ (!\s[1]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[0]~input_o\,
	datab => \s[1]~input_o\,
	datac => \s[2]~input_o\,
	datad => \Mux8~0_combout\,
	combout => \Mux8~1_combout\);

-- Location: FF_X53_Y29_N29
\overflow~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Mux8~1_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \overflow~reg0_q\);

-- Location: FF_X53_Y29_N17
\segsel[1]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \segsel~0_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \segsel[1]~reg0_q\);

-- Location: LCCOMB_X52_Y29_N16
\segsel[0]~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \segsel[0]~2_combout\ = !\segsel[0]~reg0_q\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000111100001111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \segsel[0]~reg0_q\,
	combout => \segsel[0]~2_combout\);

-- Location: FF_X53_Y29_N31
\segsel[0]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \segsel[0]~2_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \segsel[0]~reg0_q\);

-- Location: LCCOMB_X53_Y29_N14
\segsel~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \segsel~0_combout\ = \segsel[1]~reg0_q\ $ (\segsel[0]~reg0_q\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011001111001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \segsel[1]~reg0_q\,
	datad => \segsel[0]~reg0_q\,
	combout => \segsel~0_combout\);

-- Location: LCCOMB_X55_Y29_N8
\Selector3~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector3~14_combout\ = (\segsel[0]~reg0_q\ & (((!\segsel[1]~reg0_q\)))) # (!\segsel[0]~reg0_q\ & ((\segsel[1]~reg0_q\ & ((B(0)))) # (!\segsel[1]~reg0_q\ & (A(0)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011000011101110",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => A(0),
	datab => \segsel[0]~reg0_q\,
	datac => B(0),
	datad => \segsel[1]~reg0_q\,
	combout => \Selector3~14_combout\);

-- Location: LCCOMB_X55_Y29_N0
\Selector3~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector3~2_combout\ = (\Selector3~14_combout\ & ((B(4)) # ((!\segsel[0]~reg0_q\)))) # (!\Selector3~14_combout\ & (((A(4) & \segsel[0]~reg0_q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010110011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => B(4),
	datab => A(4),
	datac => \Selector3~14_combout\,
	datad => \segsel[0]~reg0_q\,
	combout => \Selector3~2_combout\);

-- Location: FF_X53_Y29_N11
\segsel[2]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \segsel~1_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \segsel[2]~reg0_q\);

-- Location: LCCOMB_X53_Y29_N0
\segsel~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \segsel~1_combout\ = \segsel[2]~reg0_q\ $ (((\segsel[1]~reg0_q\ & \segsel[0]~reg0_q\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110011010101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \segsel[2]~reg0_q\,
	datab => \segsel[1]~reg0_q\,
	datad => \segsel[0]~reg0_q\,
	combout => \segsel~1_combout\);

-- Location: LCCOMB_X55_Y29_N26
\Selector3~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector3~5_combout\ = (\segsel[0]~reg0_q\ & ((B(4) & ((!A(4)) # (!\s[0]~input_o\))) # (!B(4) & ((A(4))))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0010101010100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \segsel[0]~reg0_q\,
	datab => \s[0]~input_o\,
	datac => B(4),
	datad => A(4),
	combout => \Selector3~5_combout\);

-- Location: LCCOMB_X55_Y29_N16
\Selector3~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector3~4_combout\ = (!\segsel[0]~reg0_q\ & ((A(0) & ((!\s[0]~input_o\) # (!B(0)))) # (!A(0) & (B(0)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000001101110",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => A(0),
	datab => B(0),
	datac => \s[0]~input_o\,
	datad => \segsel[0]~reg0_q\,
	combout => \Selector3~4_combout\);

-- Location: LCCOMB_X55_Y29_N18
\Selector3~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector3~3_combout\ = (\s[2]~input_o\ & ((\segsel[0]~reg0_q\ & (A(5))) # (!\segsel[0]~reg0_q\ & ((A(1))))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010000011000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => A(5),
	datab => A(1),
	datac => \s[2]~input_o\,
	datad => \segsel[0]~reg0_q\,
	combout => \Selector3~3_combout\);

-- Location: LCCOMB_X55_Y29_N20
\Selector3~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector3~6_combout\ = (\Selector3~3_combout\) # ((!\s[2]~input_o\ & ((\Selector3~5_combout\) # (\Selector3~4_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100110010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector3~5_combout\,
	datab => \s[2]~input_o\,
	datac => \Selector3~4_combout\,
	datad => \Selector3~3_combout\,
	combout => \Selector3~6_combout\);

-- Location: LCCOMB_X55_Y29_N4
\Selector3~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector3~8_combout\ = (\s[2]~input_o\ & (((A(3))))) # (!\s[2]~input_o\ & (B(4) & (A(4))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000010001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => B(4),
	datab => A(4),
	datac => A(3),
	datad => \s[2]~input_o\,
	combout => \Selector3~8_combout\);

-- Location: LCCOMB_X55_Y29_N10
\Selector3~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector3~7_combout\ = (!\s[2]~input_o\ & (A(0) & (B(0) & !\segsel[0]~reg0_q\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000001000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[2]~input_o\,
	datab => A(0),
	datac => B(0),
	datad => \segsel[0]~reg0_q\,
	combout => \Selector3~7_combout\);

-- Location: LCCOMB_X55_Y29_N22
\Selector3~9\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector3~9_combout\ = (\s[0]~input_o\ & ((\Selector3~7_combout\) # ((\segsel[0]~reg0_q\ & \Selector3~8_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101010000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[0]~input_o\,
	datab => \segsel[0]~reg0_q\,
	datac => \Selector3~8_combout\,
	datad => \Selector3~7_combout\,
	combout => \Selector3~9_combout\);

-- Location: LCCOMB_X55_Y29_N28
\Selector3~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector3~10_combout\ = (!\s[0]~input_o\ & ((\segsel[0]~reg0_q\ & (\Add0~10_combout\)) # (!\segsel[0]~reg0_q\ & ((\Add0~2_combout\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101000101000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[0]~input_o\,
	datab => \segsel[0]~reg0_q\,
	datac => \Add0~10_combout\,
	datad => \Add0~2_combout\,
	combout => \Selector3~10_combout\);

-- Location: LCCOMB_X55_Y29_N2
\Selector3~11\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector3~11_combout\ = (\s[2]~input_o\ & \Selector3~10_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \s[2]~input_o\,
	datad => \Selector3~10_combout\,
	combout => \Selector3~11_combout\);

-- Location: LCCOMB_X55_Y29_N24
\Selector3~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector3~12_combout\ = (\s[1]~input_o\ & (\Selector3~6_combout\)) # (!\s[1]~input_o\ & (((\Selector3~9_combout\) # (\Selector3~11_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110111011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[1]~input_o\,
	datab => \Selector3~6_combout\,
	datac => \Selector3~9_combout\,
	datad => \Selector3~11_combout\,
	combout => \Selector3~12_combout\);

-- Location: LCCOMB_X54_Y29_N30
\Selector3~13\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector3~13_combout\ = (\segsel~1_combout\ & (\segsel~0_combout\ & ((\Selector3~12_combout\)))) # (!\segsel~1_combout\ & (((\Selector3~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \segsel~0_combout\,
	datab => \Selector3~2_combout\,
	datac => \segsel~1_combout\,
	datad => \Selector3~12_combout\,
	combout => \Selector3~13_combout\);

-- Location: LCCOMB_X53_Y29_N2
\Selector1~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~8_combout\ = (\segsel[2]~reg0_q\ & (\s[1]~input_o\ & (!\s[2]~input_o\ & !\segsel[1]~reg0_q\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \segsel[2]~reg0_q\,
	datab => \s[1]~input_o\,
	datac => \s[2]~input_o\,
	datad => \segsel[1]~reg0_q\,
	combout => \Selector1~8_combout\);

-- Location: LCCOMB_X53_Y29_N10
\Selector1~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~10_combout\ = (\Selector1~8_combout\ & \segsel[0]~reg0_q\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \Selector1~8_combout\,
	datad => \segsel[0]~reg0_q\,
	combout => \Selector1~10_combout\);

-- Location: LCCOMB_X53_Y29_N6
\Selector1~22\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~22_combout\ = (\segsel[0]~reg0_q\ & (((A(6))) # (!\segsel[1]~reg0_q\))) # (!\segsel[0]~reg0_q\ & (!\segsel[1]~reg0_q\ & (A(2))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101000110010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \segsel[0]~reg0_q\,
	datab => \segsel[1]~reg0_q\,
	datac => A(2),
	datad => A(6),
	combout => \Selector1~22_combout\);

-- Location: LCCOMB_X53_Y29_N16
\Selector1~11\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~11_combout\ = (\Selector1~22_combout\ & ((B(6)) # ((!\segsel~0_combout\)))) # (!\Selector1~22_combout\ & (((\segsel~0_combout\ & B(2)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101101010001010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector1~22_combout\,
	datab => B(6),
	datac => \segsel~0_combout\,
	datad => B(2),
	combout => \Selector1~11_combout\);

-- Location: LCCOMB_X53_Y29_N18
\Selector1~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~6_combout\ = (!\segsel[0]~reg0_q\ & ((\s[0]~input_o\) # ((\s[2]~input_o\) # (!\s[1]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011101111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[0]~input_o\,
	datab => \s[2]~input_o\,
	datac => \s[1]~input_o\,
	datad => \segsel[0]~reg0_q\,
	combout => \Selector1~6_combout\);

-- Location: LCCOMB_X53_Y29_N30
\Selector1~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~12_combout\ = (B(2) & ((!\Selector1~6_combout\) # (!A(2)))) # (!B(2) & (A(2)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110011011101110",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => B(2),
	datab => A(2),
	datad => \Selector1~6_combout\,
	combout => \Selector1~12_combout\);

-- Location: LCCOMB_X53_Y29_N4
\Selector1~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~7_combout\ = (!\s[2]~input_o\ & (\s[1]~input_o\ & !\segsel[0]~reg0_q\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \s[2]~input_o\,
	datac => \s[1]~input_o\,
	datad => \segsel[0]~reg0_q\,
	combout => \Selector1~7_combout\);

-- Location: LCCOMB_X53_Y29_N20
\Selector1~9\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~9_combout\ = (\segsel[0]~reg0_q\ & ((\Selector1~8_combout\ & (\s[0]~input_o\)) # (!\Selector1~8_combout\ & ((\segsel~1_combout\))))) # (!\segsel[0]~reg0_q\ & (((\segsel~1_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011111110000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[0]~input_o\,
	datab => \segsel[0]~reg0_q\,
	datac => \Selector1~8_combout\,
	datad => \segsel~1_combout\,
	combout => \Selector1~9_combout\);

-- Location: LCCOMB_X53_Y29_N8
\Selector1~21\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~21_combout\ = (\segsel[0]~reg0_q\ & (!\Selector1~8_combout\ & ((!\Selector1~9_combout\) # (!\segsel[1]~reg0_q\)))) # (!\segsel[0]~reg0_q\ & ((\segsel[1]~reg0_q\) # ((!\Selector1~9_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0100011001011111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \segsel[0]~reg0_q\,
	datab => \segsel[1]~reg0_q\,
	datac => \Selector1~8_combout\,
	datad => \Selector1~9_combout\,
	combout => \Selector1~21_combout\);

-- Location: LCCOMB_X53_Y29_N22
\Selector1~13\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~13_combout\ = (\Selector1~21_combout\ & (\Selector1~9_combout\ & ((\Selector1~12_combout\) # (!\Selector1~7_combout\)))) # (!\Selector1~21_combout\ & (((!\Selector1~9_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011000000001111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector1~12_combout\,
	datab => \Selector1~7_combout\,
	datac => \Selector1~21_combout\,
	datad => \Selector1~9_combout\,
	combout => \Selector1~13_combout\);

-- Location: LCCOMB_X57_Y29_N12
\R~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \R~3_combout\ = (A(6) & B(6))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => A(6),
	datad => B(6),
	combout => \R~3_combout\);

-- Location: LCCOMB_X57_Y29_N24
\Selector1~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~5_combout\ = (\s[2]~input_o\ & ((\s[1]~input_o\) # (\s[0]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101010001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[2]~input_o\,
	datab => \s[1]~input_o\,
	datad => \s[0]~input_o\,
	combout => \Selector1~5_combout\);

-- Location: LCCOMB_X57_Y29_N4
\Selector1~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~4_combout\ = (\s[2]~input_o\ & (\s[1]~input_o\)) # (!\s[2]~input_o\ & ((\s[0]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[2]~input_o\,
	datab => \s[1]~input_o\,
	datad => \s[0]~input_o\,
	combout => \Selector1~4_combout\);

-- Location: LCCOMB_X57_Y29_N14
\Selector1~16\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~16_combout\ = (\Selector1~5_combout\ & (((A(7)) # (!\Selector1~4_combout\)))) # (!\Selector1~5_combout\ & (\R~3_combout\ & (\Selector1~4_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110110000101100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \R~3_combout\,
	datab => \Selector1~5_combout\,
	datac => \Selector1~4_combout\,
	datad => A(7),
	combout => \Selector1~16_combout\);

-- Location: LCCOMB_X59_Y29_N20
\Selector0~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector0~4_combout\ = (!\s[1]~input_o\ & \s[2]~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101000001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[1]~input_o\,
	datac => \s[2]~input_o\,
	combout => \Selector0~4_combout\);

-- Location: LCCOMB_X54_Y29_N22
\Selector1~17\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~17_combout\ = (\Selector1~16_combout\ & (((A(5))) # (!\Selector0~4_combout\))) # (!\Selector1~16_combout\ & (\Selector0~4_combout\ & ((\Add0~14_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110011010100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector1~16_combout\,
	datab => \Selector0~4_combout\,
	datac => A(5),
	datad => \Add0~14_combout\,
	combout => \Selector1~17_combout\);

-- Location: LCCOMB_X57_Y29_N30
\R~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \R~2_combout\ = (A(2) & B(2))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => A(2),
	datad => B(2),
	combout => \R~2_combout\);

-- Location: LCCOMB_X57_Y29_N8
\Selector1~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~14_combout\ = (\Selector1~4_combout\ & ((\Selector1~5_combout\ & ((A(3)))) # (!\Selector1~5_combout\ & (\R~2_combout\)))) # (!\Selector1~4_combout\ & (\Selector1~5_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110110001100100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector1~4_combout\,
	datab => \Selector1~5_combout\,
	datac => \R~2_combout\,
	datad => A(3),
	combout => \Selector1~14_combout\);

-- Location: LCCOMB_X57_Y29_N18
\Selector1~15\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~15_combout\ = (\Selector0~4_combout\ & ((\Selector1~14_combout\ & (A(1))) # (!\Selector1~14_combout\ & ((\Add0~6_combout\))))) # (!\Selector0~4_combout\ & (((\Selector1~14_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101101011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector0~4_combout\,
	datab => A(1),
	datac => \Selector1~14_combout\,
	datad => \Add0~6_combout\,
	combout => \Selector1~15_combout\);

-- Location: LCCOMB_X54_Y29_N24
\Selector1~18\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~18_combout\ = (\Selector1~7_combout\) # ((\Selector1~6_combout\ & ((\Selector1~15_combout\))) # (!\Selector1~6_combout\ & (\Selector1~17_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111011011100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector1~6_combout\,
	datab => \Selector1~7_combout\,
	datac => \Selector1~17_combout\,
	datad => \Selector1~15_combout\,
	combout => \Selector1~18_combout\);

-- Location: LCCOMB_X54_Y29_N18
\Selector1~19\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~19_combout\ = (\Selector1~13_combout\ & (((\Selector1~18_combout\) # (!\Selector1~9_combout\)))) # (!\Selector1~13_combout\ & (\Selector1~11_combout\ & (!\Selector1~9_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111000001110",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector1~11_combout\,
	datab => \Selector1~13_combout\,
	datac => \Selector1~9_combout\,
	datad => \Selector1~18_combout\,
	combout => \Selector1~19_combout\);

-- Location: LCCOMB_X54_Y29_N16
\Selector1~20\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector1~20_combout\ = (\Selector1~10_combout\ & ((B(6) & ((\Selector1~19_combout\) # (!A(6)))) # (!B(6) & (A(6))))) # (!\Selector1~10_combout\ & (((\Selector1~19_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110100101000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector1~10_combout\,
	datab => B(6),
	datac => A(6),
	datad => \Selector1~19_combout\,
	combout => \Selector1~20_combout\);

-- Location: LCCOMB_X57_Y29_N10
\Selector2~9\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector2~9_combout\ = (\segsel[0]~reg0_q\ & (((A(5)) # (!\segsel[1]~reg0_q\)))) # (!\segsel[0]~reg0_q\ & (A(1) & ((!\segsel[1]~reg0_q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010000011101110",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \segsel[0]~reg0_q\,
	datab => A(1),
	datac => A(5),
	datad => \segsel[1]~reg0_q\,
	combout => \Selector2~9_combout\);

-- Location: LCCOMB_X57_Y29_N16
\Selector2~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector2~6_combout\ = (\segsel~0_combout\ & ((\Selector2~9_combout\ & ((B(5)))) # (!\Selector2~9_combout\ & (B(1))))) # (!\segsel~0_combout\ & (((\Selector2~9_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => B(1),
	datab => B(5),
	datac => \segsel~0_combout\,
	datad => \Selector2~9_combout\,
	combout => \Selector2~6_combout\);

-- Location: LCCOMB_X56_Y29_N26
\R~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \R~0_combout\ = (A(1) & B(1))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1000100010001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => A(1),
	datab => B(1),
	combout => \R~0_combout\);

-- Location: LCCOMB_X57_Y29_N2
\Selector2~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector2~2_combout\ = (\Selector1~4_combout\ & ((\Selector1~5_combout\ & (A(2))) # (!\Selector1~5_combout\ & ((\R~0_combout\))))) # (!\Selector1~4_combout\ & (((\Selector1~5_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector1~4_combout\,
	datab => A(2),
	datac => \R~0_combout\,
	datad => \Selector1~5_combout\,
	combout => \Selector2~2_combout\);

-- Location: LCCOMB_X56_Y29_N30
\Selector2~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector2~3_combout\ = (\Selector0~4_combout\ & ((\Selector2~2_combout\ & ((A(0)))) # (!\Selector2~2_combout\ & (\Add0~4_combout\)))) # (!\Selector0~4_combout\ & (((\Selector2~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector0~4_combout\,
	datab => \Add0~4_combout\,
	datac => A(0),
	datad => \Selector2~2_combout\,
	combout => \Selector2~3_combout\);

-- Location: LCCOMB_X57_Y29_N28
\R~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \R~1_combout\ = (A(5) & B(5))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => A(5),
	datad => B(5),
	combout => \R~1_combout\);

-- Location: LCCOMB_X57_Y29_N22
\Selector2~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector2~4_combout\ = (\Selector1~4_combout\ & ((\Selector1~5_combout\ & (A(6))) # (!\Selector1~5_combout\ & ((\R~1_combout\))))) # (!\Selector1~4_combout\ & (((\Selector1~5_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101101011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector1~4_combout\,
	datab => A(6),
	datac => \Selector1~5_combout\,
	datad => \R~1_combout\,
	combout => \Selector2~4_combout\);

-- Location: LCCOMB_X56_Y29_N24
\Selector2~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector2~5_combout\ = (\Selector0~4_combout\ & ((\Selector2~4_combout\ & (A(4))) # (!\Selector2~4_combout\ & ((\Add0~12_combout\))))) # (!\Selector0~4_combout\ & (\Selector2~4_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110011011000100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector0~4_combout\,
	datab => \Selector2~4_combout\,
	datac => A(4),
	datad => \Add0~12_combout\,
	combout => \Selector2~5_combout\);

-- Location: LCCOMB_X56_Y29_N2
\Selector2~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector2~10_combout\ = (\Selector1~7_combout\ & (!\Selector1~6_combout\)) # (!\Selector1~7_combout\ & ((\Selector1~6_combout\ & (\Selector2~3_combout\)) # (!\Selector1~6_combout\ & ((\Selector2~5_combout\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0111001101100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector1~7_combout\,
	datab => \Selector1~6_combout\,
	datac => \Selector2~3_combout\,
	datad => \Selector2~5_combout\,
	combout => \Selector2~10_combout\);

-- Location: LCCOMB_X56_Y29_N28
\Selector2~11\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector2~11_combout\ = (\Selector1~7_combout\ & ((B(1) & ((\Selector2~10_combout\) # (!A(1)))) # (!B(1) & (A(1))))) # (!\Selector1~7_combout\ & (((\Selector2~10_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110100101000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector1~7_combout\,
	datab => B(1),
	datac => A(1),
	datad => \Selector2~10_combout\,
	combout => \Selector2~11_combout\);

-- Location: LCCOMB_X56_Y29_N0
\Selector2~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector2~7_combout\ = (\Selector1~9_combout\ & (((\Selector1~21_combout\ & \Selector2~11_combout\)))) # (!\Selector1~9_combout\ & ((\Selector2~6_combout\) # ((!\Selector1~21_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110010101000101",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector1~9_combout\,
	datab => \Selector2~6_combout\,
	datac => \Selector1~21_combout\,
	datad => \Selector2~11_combout\,
	combout => \Selector2~7_combout\);

-- Location: LCCOMB_X54_Y29_N28
\Selector2~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector2~8_combout\ = (\Selector1~10_combout\ & ((B(5) & ((\Selector2~7_combout\) # (!A(5)))) # (!B(5) & (A(5))))) # (!\Selector1~10_combout\ & (((\Selector2~7_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110100101000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector1~10_combout\,
	datab => B(5),
	datac => A(5),
	datad => \Selector2~7_combout\,
	combout => \Selector2~8_combout\);

-- Location: LCCOMB_X57_Y29_N6
\Selector0~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector0~14_combout\ = (\segsel[0]~reg0_q\ & (((A(7)) # (!\segsel[1]~reg0_q\)))) # (!\segsel[0]~reg0_q\ & (A(3) & ((!\segsel[1]~reg0_q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100000011111010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => A(3),
	datab => A(7),
	datac => \segsel[0]~reg0_q\,
	datad => \segsel[1]~reg0_q\,
	combout => \Selector0~14_combout\);

-- Location: LCCOMB_X57_Y29_N20
\Selector0~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector0~5_combout\ = (\segsel~0_combout\ & ((\Selector0~14_combout\ & (B(7))) # (!\Selector0~14_combout\ & ((B(3)))))) # (!\segsel~0_combout\ & (((\Selector0~14_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => B(7),
	datab => \segsel~0_combout\,
	datac => B(3),
	datad => \Selector0~14_combout\,
	combout => \Selector0~5_combout\);

-- Location: LCCOMB_X53_Y29_N12
\Selector0~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector0~8_combout\ = (A(3) & (\s[1]~input_o\ $ (((\s[0]~input_o\ & B(3)))))) # (!A(3) & (((\s[1]~input_o\ & B(3)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110110011000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[0]~input_o\,
	datab => \s[1]~input_o\,
	datac => A(3),
	datad => B(3),
	combout => \Selector0~8_combout\);

-- Location: LCCOMB_X53_Y29_N26
\Selector0~9\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector0~9_combout\ = (!\s[2]~input_o\ & \Selector0~8_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \s[2]~input_o\,
	datad => \Selector0~8_combout\,
	combout => \Selector0~9_combout\);

-- Location: LCCOMB_X55_Y29_N12
\Selector0~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector0~10_combout\ = (!\s[1]~input_o\ & ((\s[0]~input_o\ & ((A(2)))) # (!\s[0]~input_o\ & (\Add0~8_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011001000010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[0]~input_o\,
	datab => \s[1]~input_o\,
	datac => \Add0~8_combout\,
	datad => A(2),
	combout => \Selector0~10_combout\);

-- Location: LCCOMB_X55_Y29_N14
\Selector0~11\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector0~11_combout\ = (\s[2]~input_o\ & ((\Selector0~10_combout\) # ((\s[1]~input_o\ & A(4)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110010000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[1]~input_o\,
	datab => \s[2]~input_o\,
	datac => A(4),
	datad => \Selector0~10_combout\,
	combout => \Selector0~11_combout\);

-- Location: LCCOMB_X55_Y29_N30
\Selector0~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector0~6_combout\ = (\s[1]~input_o\ & (!\s[2]~input_o\ & ((A(7)) # (B(7)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0010001000100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[1]~input_o\,
	datab => \s[2]~input_o\,
	datac => A(7),
	datad => B(7),
	combout => \Selector0~6_combout\);

-- Location: LCCOMB_X57_Y29_N26
\Mux0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux0~0_combout\ = (\s[2]~input_o\ & (\s[1]~input_o\)) # (!\s[2]~input_o\ & ((\s[1]~input_o\ & (B(7) $ (A(7)))) # (!\s[1]~input_o\ & (B(7) & A(7)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001110011001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[2]~input_o\,
	datab => \s[1]~input_o\,
	datac => B(7),
	datad => A(7),
	combout => \Mux0~0_combout\);

-- Location: LCCOMB_X57_Y29_N0
\Mux0~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux0~1_combout\ = (\s[2]~input_o\ & ((\Mux0~0_combout\ & ((A(7)))) # (!\Mux0~0_combout\ & (A(6))))) # (!\s[2]~input_o\ & (((\Mux0~0_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111100001011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[2]~input_o\,
	datab => A(6),
	datac => \Mux0~0_combout\,
	datad => A(7),
	combout => \Mux0~1_combout\);

-- Location: LCCOMB_X55_Y29_N6
\Selector0~15\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector0~15_combout\ = (!\s[1]~input_o\ & (\Add0~16_combout\ & \s[2]~input_o\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s[1]~input_o\,
	datac => \Add0~16_combout\,
	datad => \s[2]~input_o\,
	combout => \Selector0~15_combout\);

-- Location: LCCOMB_X54_Y29_N6
\Selector0~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector0~7_combout\ = (\s[0]~input_o\ & (((\Mux0~1_combout\)))) # (!\s[0]~input_o\ & ((\Selector0~6_combout\) # ((\Selector0~15_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001111100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector0~6_combout\,
	datab => \s[0]~input_o\,
	datac => \Mux0~1_combout\,
	datad => \Selector0~15_combout\,
	combout => \Selector0~7_combout\);

-- Location: LCCOMB_X54_Y29_N12
\Selector0~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector0~12_combout\ = (\segsel[0]~reg0_q\ & (((\Selector0~7_combout\)))) # (!\segsel[0]~reg0_q\ & ((\Selector0~9_combout\) # ((\Selector0~11_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111000110010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector0~9_combout\,
	datab => \segsel[0]~reg0_q\,
	datac => \Selector0~11_combout\,
	datad => \Selector0~7_combout\,
	combout => \Selector0~12_combout\);

-- Location: LCCOMB_X54_Y29_N2
\Selector0~13\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Selector0~13_combout\ = (\segsel~1_combout\ & (\segsel~0_combout\ & ((\Selector0~12_combout\)))) # (!\segsel~1_combout\ & (((\Selector0~5_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101100001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \segsel~1_combout\,
	datab => \segsel~0_combout\,
	datac => \Selector0~5_combout\,
	datad => \Selector0~12_combout\,
	combout => \Selector0~13_combout\);

-- Location: LCCOMB_X54_Y29_N0
\WideOr7~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \WideOr7~0_combout\ = (\Selector1~20_combout\ & ((\Selector2~8_combout\) # (\Selector3~13_combout\ $ (\Selector0~13_combout\)))) # (!\Selector1~20_combout\ & ((\Selector2~8_combout\ $ (\Selector0~13_combout\)) # (!\Selector3~13_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101011111111001",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector3~13_combout\,
	datab => \Selector1~20_combout\,
	datac => \Selector2~8_combout\,
	datad => \Selector0~13_combout\,
	combout => \WideOr7~0_combout\);

-- Location: FF_X54_Y29_N1
\codeout[0]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \WideOr7~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \codeout[0]~reg0_q\);

-- Location: LCCOMB_X54_Y29_N26
\WideOr6~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \WideOr6~0_combout\ = (\Selector0~13_combout\ & ((\Selector3~13_combout\ & ((!\Selector2~8_combout\))) # (!\Selector3~13_combout\ & (!\Selector1~20_combout\)))) # (!\Selector0~13_combout\ & ((\Selector3~13_combout\ $ (!\Selector2~8_combout\)) # 
-- (!\Selector1~20_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0001101110110111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector3~13_combout\,
	datab => \Selector1~20_combout\,
	datac => \Selector0~13_combout\,
	datad => \Selector2~8_combout\,
	combout => \WideOr6~0_combout\);

-- Location: FF_X54_Y29_N27
\codeout[1]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \WideOr6~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \codeout[1]~reg0_q\);

-- Location: LCCOMB_X54_Y29_N4
\WideOr5~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \WideOr5~0_combout\ = (\Selector1~20_combout\ & (((\Selector3~13_combout\ & !\Selector2~8_combout\)) # (!\Selector0~13_combout\))) # (!\Selector1~20_combout\ & ((\Selector3~13_combout\) # ((\Selector0~13_combout\) # (!\Selector2~8_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011111010111111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector3~13_combout\,
	datab => \Selector1~20_combout\,
	datac => \Selector0~13_combout\,
	datad => \Selector2~8_combout\,
	combout => \WideOr5~0_combout\);

-- Location: FF_X54_Y29_N5
\codeout[2]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \WideOr5~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \codeout[2]~reg0_q\);

-- Location: LCCOMB_X54_Y29_N10
\WideOr4~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \WideOr4~0_combout\ = (\Selector2~8_combout\ & ((\Selector3~13_combout\ & (!\Selector1~20_combout\)) # (!\Selector3~13_combout\ & ((\Selector1~20_combout\) # (!\Selector0~13_combout\))))) # (!\Selector2~8_combout\ & ((\Selector0~13_combout\) # 
-- (\Selector3~13_combout\ $ (!\Selector1~20_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110011111111001",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector3~13_combout\,
	datab => \Selector1~20_combout\,
	datac => \Selector0~13_combout\,
	datad => \Selector2~8_combout\,
	combout => \WideOr4~0_combout\);

-- Location: FF_X54_Y29_N11
\codeout[3]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \WideOr4~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \codeout[3]~reg0_q\);

-- Location: LCCOMB_X54_Y29_N20
\WideOr3~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \WideOr3~0_combout\ = (\Selector2~8_combout\ & (((\Selector0~13_combout\)) # (!\Selector3~13_combout\))) # (!\Selector2~8_combout\ & ((\Selector1~20_combout\ & ((\Selector0~13_combout\))) # (!\Selector1~20_combout\ & (!\Selector3~13_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110101010001",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector3~13_combout\,
	datab => \Selector1~20_combout\,
	datac => \Selector2~8_combout\,
	datad => \Selector0~13_combout\,
	combout => \WideOr3~0_combout\);

-- Location: FF_X54_Y29_N21
\codeout[4]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \WideOr3~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \codeout[4]~reg0_q\);

-- Location: LCCOMB_X54_Y29_N14
\WideOr2~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \WideOr2~0_combout\ = (\Selector3~13_combout\ & (\Selector0~13_combout\ $ (((\Selector1~20_combout\ & !\Selector2~8_combout\))))) # (!\Selector3~13_combout\ & ((\Selector1~20_combout\) # ((\Selector0~13_combout\) # (!\Selector2~8_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010001111101",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector3~13_combout\,
	datab => \Selector1~20_combout\,
	datac => \Selector0~13_combout\,
	datad => \Selector2~8_combout\,
	combout => \WideOr2~0_combout\);

-- Location: FF_X54_Y29_N15
\codeout[5]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \WideOr2~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \codeout[5]~reg0_q\);

-- Location: LCCOMB_X54_Y29_N8
\WideOr1~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \WideOr1~0_combout\ = (\Selector3~13_combout\ & ((\Selector0~13_combout\) # (\Selector1~20_combout\ $ (\Selector2~8_combout\)))) # (!\Selector3~13_combout\ & ((\Selector2~8_combout\) # (\Selector1~20_combout\ $ (\Selector0~13_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111011110111100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Selector3~13_combout\,
	datab => \Selector1~20_combout\,
	datac => \Selector0~13_combout\,
	datad => \Selector2~8_combout\,
	combout => \WideOr1~0_combout\);

-- Location: FF_X54_Y29_N9
\codeout[6]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \WideOr1~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \codeout[6]~reg0_q\);

ww_overflow <= \overflow~output_o\;

ww_codeout(0) <= \codeout[0]~output_o\;

ww_codeout(1) <= \codeout[1]~output_o\;

ww_codeout(2) <= \codeout[2]~output_o\;

ww_codeout(3) <= \codeout[3]~output_o\;

ww_codeout(4) <= \codeout[4]~output_o\;

ww_codeout(5) <= \codeout[5]~output_o\;

ww_codeout(6) <= \codeout[6]~output_o\;

ww_codeout(7) <= \codeout[7]~output_o\;

ww_segsel(0) <= \segsel[0]~output_o\;

ww_segsel(1) <= \segsel[1]~output_o\;

ww_segsel(2) <= \segsel[2]~output_o\;

ww_segsel(3) <= \segsel[3]~output_o\;

ww_segsel(4) <= \segsel[4]~output_o\;

ww_segsel(5) <= \segsel[5]~output_o\;

ww_segsel(6) <= \segsel[6]~output_o\;

ww_segsel(7) <= \segsel[7]~output_o\;
END structure;


